As is well known, on a system to record digital data via a rotating transformer such as a helical scanning type VTR, etc. as described above, a so-called DC (direct current) free modulation system having no low frequency power spectrum is desirable because it is difficult to transmit low frequency components. Various digital data modulation systems to realize this DC free and high density recording have been so far considered and, for instance, a code conversion system called the 8-14 modulation system which converts digital data into 14-bit data code in 8 bit-wise is described in the literature (National Technical Report, Vol. 32, No. 4, August 1986). This system is DC free type and has the density ratio of 1.4 which is higher than the density ratio of 1.0 of the EFM modulation system which has been so far commonly used.
The 8-14 modulation system converts digital data into 14-bit data code using Non-Return to Zero Inverted (NRZI) conversions, Codeword Digital Sum values (CDS), and Digital Sum Variation values (DSV).
In order to determine the CDS of a bit pattern an NRZI conversion is first performed. For example, the 14-bit code "01000101000010" is converted to a bit pattern of "01111001111100" through the use of a NRZI conversion, because a NRZI conversion reverses bit values in the converted bit-string when a "1" is encountered in the original bit string. The CDS calculation is then carried out on the converted bit pattern. An arithmetic sum is calculated by associating bits "0" and "1" with values -1 and +1, respectively. For example, the CDS value of the converted bit pattern is calculated as follows: (-1), (0), (1), (2), (3), (2), (1), (2), (3), (4), (5), (6), (5), (4). Thus the original 14-bit pattern "01000101000010" has a CDS value of 4.
The method for calculating a digital sum variation value is described, for example, in U.S. Pat. No. 4,731,678, which is incorporated herein by reference. The DSV value is accumulated one by one along an array of converted 14-bit patterns by adding the CDS value of the present 14-bit pattern to the DSV value of the preceding converted 14-bit pattern.
With respect to code assignment in an 8 to 14-bit modulation system, modulation codes having a DSV value "0" correspond with digital data on a one-for-one basis, while modulation codes having a DSV value other than "0" are divided into a positive DSV group and a negative DSV group, and two modulation codes are forced to correspond with one digital data, that is, on a one-for-two basis. FIG. 1 shows this corresponding relation. That is, the DSV (Digital Sum Variation) value is an integrated value of [1] (positive polarity) when the waveform after the NRZI (Non-Return to Zero Inverted) conversion of a modulation code train is H (high) level and [-1] (negative polarity) when it is L (low) level. In this case, however, the waveform after the NRZI conversion starts from L level. Therefore, the DSV value is accumulated one by one along an array of connected 14-bit patterns by adding the CDS value of the present 14-bit pattern to the DSV value of the preceding converted 14-bit pattern. In addition, CDS value is DSV within one modulation code.
A modulation data code is DC free if the absolute value of the DSV is always small and therefore, in the code conversion, a modulation code is selected from an appropriate group so that the fluctuation range of the DSV is limited.
On the other hand, in the case of the 8-14 modulation system, in a data code train that is transmitted 14 bit-wise after modulation, the minimum value d of continuous data "0" bits (hereinafter referred to as the zero bit) is set at 1 and the maximum value k is set at 8. That is, the number of continuous zero bits interposed between data "1" bit and next data "1" bit is over the range from 1 to 8.
In other words, data "1" bit is never continuous and at least one zero bit interposes between a data "1" bit and the next data "1" bit. Therefore, in order to restrict the number of continuous zero bits to below 8 not only with a single 14-bit data code but also for two successive 14-bit data codes, the number of continuous zero bits at the beginning and end portions of a 14-bit code is restricted to 4 and below. Thus, even when the number of continuous zero bits at the end side of the preceding 14-bit data code shown in FIG. 2(a) is 4 and that at the beginning side of succeeding 14-bit data code shown in FIG. 2(b) is also 4, the number of continuous zero bits among successive data codes can be set to 8, as shown in FIG. 2(c).
When digital data is recorded on a VTR, a shorter bit polarity inversion interval is better for purposes of self bit synchronization, crosstalk suppression, etc. Therefore, on the 8-14 modulation system, in order to reduce the upper limit for the number of continuous zero bits to 6 from 8, if the upper limit of 6 is given to the number of continuous zero bits within 14-bit data code and 3 is given to the number of continuous zero bits at both the beginning and end sides of a 14-bit data code in the same manner as described above, the number of usable data codes may become insufficient and it becomes impossible to construct modulation codes.
Further, the EFM modulation system which is used for compact disc systems, converts 8-bit digital data into 14-bit data code with a 3-bit binding data code inserted into the 14-bit data code as shown in FIG. 3. This binding data code is inserted to perform the waveform conversion by force so that H level and L level of recorded waveform correspond with each other when recording a data code train after the NRZI conversion.
In this case, as no upper limit is given to the number of continuous zero bits as in the above 8-14 modulation system but the same operation is carried out in a sense to perform the polarity inversion at a required place, and as a result of adding 3-bit redundant binding data code, recording efficiency drops in opposition to high density recording.
As described above, on the conventional code conversion system, for instance, in case of the 8-14 modulation system, the upper limit for the number of continuous zero bits is restricted to 8 and to make it smaller it is necessary to allow the addition of a new redundant bit which impedes of high-density recording results.